Changeset 10154
- Timestamp:
- 07/03/08 15:46:05 (2 months ago)
- Files:
-
- trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
- Modified
- Copied
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trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp
r10122 r10154 1818 1818 uint32_t cpl; 1819 1819 1820 /* 1821 * The hidden CS.DPL register is always equal to the CPL, it is 1822 * not affected by loading a conforming coding segment. 1823 */ 1820 1824 if (CPUMAreHiddenSelRegsValid(pVM)) 1821 1825 cpl = pCtxCore->csHid.Attr.n.u2Dpl; … … 1824 1828 if (RT_LIKELY(!pCtxCore->eflags.Bits.u1VM)) 1825 1829 { 1830 /* 1831 * The SS RPL is always equal to the CPL, while the CS RPL 1832 * isn't necessarily equal if the segment is conforming. 1833 * See section 4.11.1 in the AMD manual. 1834 */ 1826 1835 cpl = (pCtxCore->ss & X86_SEL_RPL); 1827 1836 #ifndef IN_RING0

